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What is the structure of a MIM capacitor

I can’t believe somebody replied to this question with the text of a patent, so I’m going to try a very simple answer.

Not because of you, dear reader, but because my knowledge of MIMs is very basic.


I have used them in only one IC process, a BiCMOS process. The issues we had with their reliability were a nightmare.

 When I then moved (other Company) to pure CMOS processes, the MIM option was discarded altogether.


Anyhow: a capacitor is a structure built out of two metal electrodes separated by an insulator. So far, so good.

When dealing with Integrated Circuit (IC) processes, generally the wafer cross section sees the use of various metals,

stacked like a sandwich. If the bread are the metals, the lettuce would be some oxide (SiO2 most of the time),

which happens to be an insulator.

So, the yellow is insulating material, the red is metal.

It is therefore very easy to create capacitors using two metals on top of each other. When you do this, you speak about

MOM capacitors (Metal Oxide Metal).


These are good capacitors, but the fact is that, for mechanical and other reasons, the oxide between the metals

(called Inter Metal Dielectric, IMD) cannot be made too thin. What does it mean? Well, remember the formula giving the

 capacitance of a parallel plate capacitor? It reads:

C=ϵAdC=ϵAd


Where A is the area of the metal plates, d is the distance between them. Therefore, if we can’t make d very small, it means

that we need a ‘large’ area - A - to implement a certain capacitance value. We refer to this saying that the ‘capacitance density’

of MOMs is not that great.


In the MIM technology, however, we introduce an extra dielectric in the fabrication process, and also a new metal layer.

This dielectric is far thinner than a normal IMD, which gives rise to a much higher cap density for MIMs.